MOSFETs and MISFETs (metal-insulator-semiconductor field effect transistors) have been the subject of intense study for several decades. Heterogeneous integration of novel dielectrics and novel channel materials has recently gained increasing attention as a necessity to further drive Si complementary metal-oxide semiconductor (CMOS) integration, functional density, speed and power dissipation, and to extend CMOS front-end fabrication to and beyond the 22 nm node. Using III-V compound semiconductors as conduction channels, to replace traditional Si or strained Si, is currently an active research frontier due to the excellent electrical properties of III-V compound semiconductors and the existence of a viable III-V industry for more than 30 years.
The principal obstacle to III-V compound semiconductors rivaling or exceeding the properties of Si electronics has been the lack of high-quality, thermodynamically stable insulators on GaAs (or on III-V materials in general) that equal the outstanding properties of SiO2 on Si, e.g., a mid-band gap interface-trap density (Dit) of ˜1010/cm2 eV. For decades, the research community has searched for suitable III-V compound semiconductor gate dielectrics or passivation layers. The literature testifies to the extent of this effort, with representative, currently active approaches including sulfur passivation, silicon interface control layers (Si ICLs), in situ molecular beam epitaxy (MBE) growth of Ga2O3(Gd2O3), ex situ atomic layer deposition (ALD) growth of Al2O3 and HfO2, wet oxidation of InAlP, jet vapor deposition of Si3N4, and ALD or PVD of HfO2+Si ICL. Nonetheless, such techniques are somewhat difficult to implement, tend to be relatively expensive and provide little compositional or fabrication flexibility. As a result, the search for useful gate dielectric materials remains an on-going concern in the art.